The present invention relates in general to semiconductor devices, and more specifically, to fabrication methodologies and resulting structures for vertical field effect transistors (VFETs) having uniform bottom spacers.
In contemporary semiconductor device fabrication processes, a large number of semiconductor devices, such as field effect transistors (FETs), are fabricated on a single wafer. Some non-planar transistor architectures, such as VFETs, employ semiconductor fins and side-gates that can be contacted outside the active region, resulting in increased device density and some increased performance over lateral devices. In VFETs, the source to drain current flows in a direction that is perpendicular to a major surface of the substrate. For example, in a known VFET configuration a major substrate surface is horizontal and a vertical fin or nanowire extends upward from the substrate surface. The fin or nanowire forms the channel region of the transistor. A source region and a drain region are situated in electrical contact with the top and bottom ends of the channel region, while the gate is disposed on one or more of the fin or nanowire sidewalls.
Some non-planar transistor device architectures, such as VFETs, employ semiconductor fins and side-gates that can be contacted outside the active region, resulting in increased device density over lateral devices. When forming VFETs, bottom spacers need to be provided between and around vertical structures.
Forming the bottom spacers of a VFET by directional deposition techniques (e.g., high-density plasma deposition (HDP), physical vapor deposition (PVD), or gas clustering ion beam deposition (GCIB), etc.) can be problematic due to fin tapering and the high aspect ratio of the fin structure. Although directional deposition onto a structure should result in deposition on the co-planar surfaces perpendicular to the direction of the deposition, in practice deposition can affect the non-planar surfaces as well. Thus, additional etching processes are needed to remove the parasitic deposition on the non-planar surfaces, which results in bottom spacer thickness variation.